Dependencies
This extension is written against the SPIR-V Specification, Version 1.4 Revision 1.
This extension requires SPIR-V 1.0.
Overview
This extension adds an instruction which explicitly requests that a pipelining register be introduced at a particular point in a program (on a specific assignment). The instruction is useful for FPGA targets, to separate regions of the program that are expected to end up in geographically distant regions of a device. This instruction is purely an optimization hint, and is functionally equivalent to an assignment.
Extension Name
To use this extension within a SPIR-V module, the following OpExtension must be present in the module:
OpExtension "SPV_ALTERA_fpga_reg"
Modifications to the SPIR-V Specification, Version 1.4
Capability
Modify Section 3.31, Capability, adding a row to the Capability table:
| Capability | Implicitly Declares | |
|---|---|---|
5948 |
FPGARegALTERA |
|
Instructions
In section 3.32.1, Miscellaneous Instructions, add a new instruction, OpFPGARegALTERA, as follows:
OpFPGARegALTERA Used to indicate to FPGA backends that pipelining registers should be inserted between the definition of Input and uses of Result. The value passed in as Input is returned in Result. This instruction is strictly an optimization hint and thus it would be functionally correct for a consumer to treat it as an assignment. Result Type can be any type and is the type of both Result and Input. |
Capability: FPGARegALTERA |
|||
4 |
5949 |
<id> |
Result <id> |
Input <id> |