SPV_ARM_cooperative_matrix

Name Strings

SPV_ARM_cooperative_matrix_layouts

Contact

To report problems with this extension, please open a new issue at:

https://github.com/KhronosGroup/SPIRV-Headers

Contributors

Kevin Petit, Arm Ltd.

Notice

Status

Complete.

Version

Last Modified Date

2025-11-10

Revision

Dependencies

This extension is written against the SPIR-V Specification, Version 1.6 Revision 2.

This extension requires SPIR-V 1.6.

This extension requires SPV_KHR_cooperative_matrix.

Overview

This extension adds support for cooperative matrix memory layouts used on Arm GPUs.

Extension Name

To use this extension within a SPIR-V module, the following OpExtension must be present in the module:

OpExtension "SPV_ARM_cooperative_matrix_layouts"

Modifications to the SPIR-V Specification, Version 1.6

Validation Rules

Modify section 2.16.1 Universal Validation Rules:

If the MemoryLayout provided to OpCooperativeMatrixLoadKHR or OpCooperativeMatrixStoreKHR is RowBlockedInterleavedARM or ColumnBlockedInterleavedARM then Stride must be present, come from a constant instruction, and be equal to 1, 2, or 4.
If the MemoryLayout provided to OpCooperativeMatrixLoadKHR or OpCooperativeMatrixStoreKHR is RowBlockedInterleavedARM then their Result Type, or Object, respectively, must be a cooperative matrix type whose Rows is a multiple of 4 and whose Columns is a multiple of 16 / sizeof(Component Type) multiplied by the Stride operand to the OpCooperativeMatrixLoadKHR or OpCooperativeMatrixStoreKHR instruction.
If the MemoryLayout provided to OpCooperativeMatrixLoadKHR or OpCooperativeMatrixStoreKHR is ColumnBlockedInterleavedARM then their Result Type, or Object, respectively, must be a cooperative matrix type whose Rows is a multiple of 4 times the Stride operand to the OpCooperativeMatrixLoadKHR or OpCooperativeMatrixStoreKHR instruction and whose Columns is a multiple of 16 / sizeof(Component Type).

Capabilities

Modify Section 3.31, "Capability", adding these rows to the Capability table:

Capability	Implicitly Declares
4201	CooperativeMatrixLayoutsARM Uses ARM cooperative matrix layouts	CooperativeMatrixKHR

Capability

Implicitly Declares

4201

CooperativeMatrixLayoutsARM
Uses ARM cooperative matrix layouts

CooperativeMatrixKHR

3.X Cooperative Matrix Layout

Add the following to the table introduced by SPV_KHR_cooperative_matrix:

Cooperative Matrix Layout Enabling Capabilities

Cooperative Matrix Layout	Enabling Capabilities
4202	RowBlockedInterleavedARM Matrix elements are grouped in blocks of 64 bytes. Each block stores a sub-matrix of 4 rows and a number of columns that depends on the size of the Component Type of the matrix. The number of columns in a block is given by 16 / `sizeof`(Component Type). The matrix elements within individual blocks are laid out in row-major order. Blocks are laid out in row-major order. Blocks are interleaved at a 4-byte granularity in in groups whose size is given by the Stride operand to OpCooperativeMatrixLoadKHR or OpCooperativeMatrixStoreKHR.	CooperativeMatrixLayoutsARM
4203	ColumnBlockedInterleavedARM Matrix elements are grouped in blocks of 64 bytes. Each block stores a sub-matrix of 4 rows and a number of columns that depends on the size of the Component Type of the matrix. The number of columns in a block is given by 16 / `sizeof`(Component Type). The matrix elements within individual blocks are laid out in row-major order. Blocks are laid out in column-major order. Blocks are interleaved at a 4-byte granularity in in groups whose size is given by the Stride operand to OpCooperativeMatrixLoadKHR or OpCooperativeMatrixStoreKHR.	CooperativeMatrixLayoutsARM

4202

RowBlockedInterleavedARM
Matrix elements are grouped in blocks of 64 bytes. Each block stores a sub-matrix of 4 rows and a number of columns that depends on the size of the Component Type of the matrix. The number of columns in a block is given by 16 / sizeof(Component Type). The matrix elements within individual blocks are laid out in row-major order. Blocks are laid out in row-major order. Blocks are interleaved at a 4-byte granularity in in groups whose size is given by the Stride operand to OpCooperativeMatrixLoadKHR or OpCooperativeMatrixStoreKHR.

CooperativeMatrixLayoutsARM

4203

ColumnBlockedInterleavedARM
Matrix elements are grouped in blocks of 64 bytes. Each block stores a sub-matrix of 4 rows and a number of columns that depends on the size of the Component Type of the matrix. The number of columns in a block is given by 16 / sizeof(Component Type). The matrix elements within individual blocks are laid out in row-major order. Blocks are laid out in column-major order. Blocks are interleaved at a 4-byte granularity in in groups whose size is given by the Stride operand to OpCooperativeMatrixLoadKHR or OpCooperativeMatrixStoreKHR.

CooperativeMatrixLayoutsARM

Issues

None.

Revision History

Rev	Date	Author	Changes
2	2025-11-10	Kevin Petit	Clarify and extend validation rules
1	2024-05-29	Kevin Petit	Initial revision