Name Strings
SPV_INTEL_fpga_loop_controls
Contact
To report problems with this extension, please open a new issue at:
Contributors
-
Artem Chikin, Intel
-
Jessica Davies, Intel
-
Joe Garvey, Intel
-
Michael Kinsner, Intel
-
Mark Mendell, Intel
-
Ci Tian, Intel
-
Bowen Xue, Intel
Notice
Copyright (c) 2019-2022 Intel Corporation. All rights reserved.
Status
Final draft
Version
Last Modified Date |
2022-10-13 |
Revision |
J |
Dependencies
This extension is written against the SPIR-V Specification, Version 1.4 Revision 1.
This extension requires SPIR-V 1.0.
Overview
This extension introduces additional loop controls for FPGA targets.
Extension Name
To use this extension within a SPIR-V module, the following OpExtension must be present in the module:
OpExtension "SPV_INTEL_fpga_loop_controls"
New capabilities
This extension introduces a new capability:
FPGALoopControlsINTEL
Token Number Assignments
FPGALoopControlsINTEL |
5888 |
Modifications to the SPIR-V Specification, Version 1.4
Loop Control
In section 3.23, Loop Control, add the following entries to the table:
Loop Control |
Enabling Capabilities |
|
0x10000 |
InitiationIntervalINTEL |
FPGALoopControlsINTEL |
0x20000 |
MaxConcurrencyINTEL |
FPGALoopControlsINTEL |
0x40000 |
DependencyArrayINTEL |
FPGALoopControlsINTEL |
0x80000 |
PipelineEnableINTEL |
FPGALoopControlsINTEL |
0x100000 |
LoopCoalesceINTEL |
FPGALoopControlsINTEL |
0x200000 |
MaxInterleavingINTEL |
FPGALoopControlsINTEL |
0x400000 |
SpeculatedIterationsINTEL |
FPGALoopControlsINTEL |
0x800000 |
NoFusionINTEL |
FPGALoopControlsINTEL |
0x1000000 |
LoopCountINTEL |
FPGALoopControlsINTEL |
0x2000000 |
MaxReinvocationDelayINTEL |
FPGALoopControlsINTEL |
Capability
Modify Section 3.31, Capability, adding a row to the Capability table:
Capability | Implicitly Declares | |
---|---|---|
5888 |
FPGALoopControlsINTEL |
Validation Rules
None.
Issues
None.
Revision History
Rev | Date | Author | Changes |
---|---|---|---|
A |
2019-05-06 |
Joe Garvey |
Initial public release |
B |
2019-05-07 |
Michael Kinsner |
Update overview wording |
C |
2019-06-02 |
Michael Kinsner |
Use loop control bits directly, as allocated in SPIRV-Headers spir-v.xml |
D |
2020-02-11 |
Artem Chikin |
Add PipelineDisableINTEL |
E |
2020-02-12 |
Ci Tian |
Add LoopCoalesceINTEL, MaxInterleavingINTEL and SpeculatedIterationsINTEL |
F |
2020-10-27 |
Jessica Davies |
Add NoFusionINTEL |
G |
2020-11-17 |
Joe Garvey |
Made LoopCoalesceINTEL argument mandatory |
H |
2021-05-03 |
Mark Mendell |
Add LoopCountINTEL |
I |
2022-08-18 |
Bowen Xue |
Add MaxReinvocationDelayINTEL |
J |
2022-10-13 |
Bowen Xue |
Update wording of MaxReinvocationDelayINTEL |