Name Strings
SPV_INTEL_subgroups
Contact
To report problems with this extension, please open a new issue at:
Contributors
-
Ben Ashbaugh, Intel
-
Biju George, Intel
-
Michael Kinsner, Intel
-
Mariusz Merecki, Intel
Notice
Copyright (c) 2017-2018 Intel Corporation. All rights reserved.
Status
-
Final Draft
Version
Last Modified Date |
2018-10-22 |
Revision |
2 |
Dependencies
This extension is written against the SPIR-V Specification, Version 1.2 Revision 1.
This extension requires SPIR-V 1.0.
Overview
The goal of this extension is to allow programmers to improve the performance of their applications by taking advantage of the fact that some work items in a work group execute together as a group (a "subgroup"), and that work items in a subgroup can use hardware features that are not available to all work items in a work group. Specifically, this extension is designed to allow work items in a subgroup to share data without the use of local memory and work group barriers, and to utilize specialized hardware to load and store blocks of data from images or buffers.
This extension builds upon "subgroups" functionality that is already in core SPIR-V, so this extension reuses many of the names, concepts, and instructions already described in SPIR-V. The key additions in this extension are:
-
Intel subgroups adds "shuffle" instructions to allow data interchange between work items within a subgroup without the use of local memory or barriers.
-
Intel subgroups adds "block read and write" instructions to take advantage of specialized hardware to read or write blocks of data from or to buffers or images.
This extension has a source language counterpart extension for the OpenCL-C kernel language, cl_intel_subgroups
, which can be used for online compilation in an OpenCL environment.
Extension Name
To use this extension within a SPIR-V module, the appropriate OpExtension must be present in the module:
OpExtension "SPV_INTEL_subgroups"
New Capabilities
This extension introduces new capabilities:
SubgroupShuffleINTEL SubgroupBufferBlockIOINTEL SubgroupImageBlockIOINTEL
New Instructions
Instructions added under the SubgroupShuffleINTEL capability:
OpSubgroupShuffleINTEL OpSubgroupShuffleDownINTEL OpSubgroupShuffleUpINTEL OpSubgroupShuffleXorINTEL
Instructions added under the SubgroupBufferBlockIOINTEL capability:
OpSubgroupBlockReadINTEL OpSubgroupBlockWriteINTEL
Instructions added under the SubgroupImageBlockIOINTEL capability:
OpSubgroupImageBlockReadINTEL OpSubgroupImageBlockWriteINTEL
Token Number Assignments
SubgroupShuffleINTEL |
5568 |
SubgroupBufferBlockIOINTEL |
5569 |
SubgroupImageBlockIOINTEL |
5570 |
OpSubgroupShuffleINTEL |
5571 |
OpSubgroupShuffleDownINTEL |
5572 |
OpSubgroupShuffleUpINTEL |
5573 |
OpSubgroupShuffleXorINTEL |
5574 |
OpSubgroupBlockReadINTEL |
5575 |
OpSubgroupBlockWriteINTEL |
5576 |
OpSubgroupImageBlockReadINTEL |
5577 |
OpSubgroupImageBlockWriteINTEL |
5578 |
Modifications to the SPIR-V Specification, Version 1.2
Capabilities
Modify Section 3.31, Capability, adding rows to the Capability table:
Capability | Implicitly Declares | Enabled by Extension | |
---|---|---|---|
5568 |
SubgroupShuffleINTEL |
SPV_INTEL_subgroups |
|
5569 |
SubgroupBufferBlockIOINTEL |
SPV_INTEL_subgroups |
|
5570 |
SubgroupImageBlockIOINTEL |
SPV_INTEL_subgroups |
Instructions
Modify Section 3.32.21, Group Instructions, adding to the end of the list of instructions:
Validation Rules
None.
Issues
None.
Revision History
Rev | Date | Author | Changes |
---|---|---|---|
1 |
2017-09-29 |
Ben Ashbaugh |
Initial revision |
2 |
2018-10-22 |
Ben Ashbaugh |
Minor formatting updates. |