Name Strings
SPV_QCOM_bfloat16_muladd
Contact
To report problems with this extension, please open a new issue at:
Contributors
-
Balaji Calidas, Qualcomm
-
Wooyoung Kim, Qualcomm
Notice
Copyright (c) 2024 The Khronos Group Inc. Copyright terms at http://www.khronos.org/registry/speccopyright.html
Status
-
Final
Version
Last Modified Date |
2025-12-31 |
Revision |
1 |
Dependencies
This extension is written against the SPIR-V Specification, Version 1.6 Revision 6.
This extension requires SPV_KHR_bfloat16.
Overview
This extension adds a new instruction that multiplies two bfloat16 values and adds the product to a 32-bit float-point value.
Extension Name
To use this extension within a SPIR-V module, the following OpExtension must be present in the module:
OpExtension "SPV_QCOM_bfloat16_muladd"
New Capabilities
This extension introduces a new capability:
BFloat16MulAddQCOM
New Instruction
The extension adds a new instruction.
OpBFloat16MulAddQCOM
Modifications to the SPIR-V Specification, Version 1.6
Capability
Modify Section 3.2.30, "Capability", adding the following row to the Capability table:
| Capability | Implicitly declares | |
|---|---|---|
4504 |
BFloat16MulAddQCOM |
|
Instruction
Modify Section 3.3.13 "Arithmetic Instructions", adding the following row to the table:
OpBFloat16MulAddQCOM Result Type is the 32-bit floating-point type. Operand 1 and Operand 2 are 16-bit floating-point values with the BFloat16KHR encoding. Operand 3 is a 32-bit floating-point value. |
Capability: |
|||||
6 |
4505 |
<id> Result Type |
<id> Operand 1 |
<id> Operand 2 |
<id> Operand 3 |
|
Validation Rules
OpExtension must be added to the SPIR-V for validation layers to check legal use of this extension:
OpExtension "SPV_QCOM_bfloat16_muladd"
Issues
Revision History
| Rev | Date | Author | Changes |
|---|---|---|---|
1 |
2025-12-31 |
Wooyoung Kim |
Initial version |